Our seminar series is free and available for anyone to attend. Unless otherwise stated, seminars take place on Wednesday afternoons at 2pm in the Kilburn Building during teaching season.

If you wish to propose a seminar speaker please contact Antoniu Pop.


Optimising fixed point arithmetic with Meta IP cores

  • Speaker:   Dr  Matthew Fortune  (Imagination Technologies)
  • Host:   Jim Garside
  • 13th February 2013 at 14:00 in Lecture Theatre 1.4, Kilburn Building
Fixed point arithmetic provides an efficient way of operating on real data types without the software or hardware overheads that come with more general floating point arithmetic. At first glance, fixed point arithmetic maps directly to integer arithmetic operations but corner cases such as saturation, rounding and multiplication can lead to inefficient code sequences. Algorithms that require fixed point arithmetic tend to also have a significant quantity of data to operate on and efficient access to memory is therefore key.

In this seminar we provide an introduction to the Meta architecture, a description of the DSP features that can be used to optimise fixed point arithmetic and a discussion of how compiler technology can target such hardware features.
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