Our seminar series is free and available for anyone to attend. Unless otherwise stated, seminars take place on Wednesday afternoons at 2pm in the Kilburn Building during teaching season.

If you wish to propose a seminar speaker please contact Antoniu Pop.


Enhancing Trust in Integrated Circuits: Selected Attacks and Countermeasures

  • Speaker:   Jennifer  Dworak  (Southern Methodist University Dallas, Texas.)
  • Host:   Vasilis Pavlidis
  • 21st November 2013 at 15:00 in Kilburn LF15
Attackers have focused on infiltrating computer systems through software for decades. However, there are many ways of compromising a system that don't necessarily involve software at all but involve the hardware instead. Hardware trust may be compromised in a variety of ways, including through the addition of hardware Trojans to integrated circuits, through the introduction of counterfeits into the supply chain, and through the unauthorized access of on-chip test, debug, and configuration hardware. The interest in defending against such attacks has increased dramatically over the last several years.

This presentation will provide an overview of some of these attacks on hardware and the previously proposed countermeasures. We will then consider in more depth a particular type of attack that uses a JTAG test port to gain access to embedded instruments and data (such as trace buffers, sensors, built-in self test engines, and chip IDs) on an IEEE P1687 scan network. A low-overhead method that utilizes ?locking segment insertion bits,? Or LSIBs, to hide secure instruments from an attacker will then be presented. We will show that even relatively small key sizes can dramatically increase the expected amount of time required for an attacker to find and access a targeted instrument.
Jennifer Dworak is an Assistant Professor in the Department of Computer Science and Engineering at Southern Methodist University in Dallas, Texas. She earned her BS, MS, and PhD degrees in Electrical Engineering from Texas A&M University and is an Associate Editor for IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. She is also a recipient of the Best Paper Award from the 1999 VLSI Test Symposium and a 2004 TTTC Naveena Nagi Award. She was an invited speaker for the session that won the ?Best Innovative Practices Award? At the 2012 VLSI Test Symposium.)
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