Computer Science with Business & Management (3 Years) [BSc]

Warning: DOMDocument::loadXML(): Empty string supplied as input in /afs/mcc/common/WWW/DocumentRoots/6/epscl/dev/comp_sci/legacy/php/coursemarketing/_course_functions_t4.php on line 189

Warning: DOMDocument::loadXML(): Start tag expected, '<' not found in Entity, line: 2 in /afs/mcc/common/WWW/DocumentRoots/6/epscl/dev/comp_sci/legacy/php/coursemarketing/_course_functions_t4.php on line 105

Chip Multiprocessors

Unit code: COMP35112
Credit Rating: 10
Unit level: Level 3
Teaching period(s): Semester 2
Offered by School of Computer Science
Available as a free choice unit?: N



Additional Requirements

Students who are not from the School of Computer Science must have permission from both Computer Science and their home School to enrol.


Due to technological limitations, it is proving increasingly difficult to maintain a continual increase in the performance of individual processors. Therefore, the current trend is to integrate multiple processors on to a single chip and exploit the resulting parallel resources to achieve higher computing power. However, this may require significantly different approaches to both hardware and software particularly for general purpose applications. This course will explore these issues in detail.

Learning outcomes

Learning outcomes are detailed on the COMP35112 course unit syllabus page on the School of Computer Science's website for current students.

Employability skills

  • Analytical skills
  • Problem solving
  • Written communication
  • Other

Assessment methods

  • Written exam - 75%
  • Written assignment (inc essay) - 25%



Trends in technology, limitations and consequences. The move to multi-coreParallelism in programs, ILP, Thread Level, Data Parallelism.

Parallel Architectures

SIMD, MIMD, Shared Memory, Distributed Memory, strengths and weaknesses.

Parallel Programming

Multithreaded programming, Data parallel programming, Explicit vs Implicit parallelism, automatic parallelisation. The Case for Shared Memory. When to share?

Shared Memory Multiprocessors

Basic structures, the cache coherence problem. The MESI protocol. Limitations. Directory based coherence.

Programming with Locks and Barriers

The need for synchronisation. Problems with explicit synchronisation

Other Parallel Programming Approaches

MPI and OpenMP


The easy route to automatic parallelisation?

Transactional Memory

Principles. Hardware and Software approaches

Memory Issues

Memory system design. Memory consistency

Other Architectures and Programming Approaches


Data Driven Parallelism

Dataflow principles and Functional Programing

Recommended reading

COMP35112 reading list can be found on the School of Computer Science website for current students.

Feedback methods

Written feedback on reports for laboratory exercises. Students who attempt previous exam questions can get feedback on their answers.

Study hours

  • Lectures - 24 hours
  • Independent study hours - 76 hours

Teaching staff

John Gurd - Unit coordinator

▲ Up to the top