Artificial Intelligence (3 Years) [BSc]

Processor Microarchitecture

Unit code: COMP22111
Credit Rating: 10
Unit level: Level 2
Teaching period(s): Semester 1
Offered by School of Computer Science
Available as a free choice unit?: Y



Additional Requirements

Students who are not from the School of Computer Science must have permission from both Computer Science and their home School to enrol.


The module aims to give a view of the role of a digital hardware designer, taking an idea and implementing it as a silicon chip. A processor is a representative example of logic used in today's chips, also giving further insight into how computers actually work.

Having completed the module you should have developed the confidence to be able to take a concept and realise it in hardware. You should also appreciate the test and verification processes involved so that your chips work efficiently and reliably ... first time, every time!


This course unit aims to reinforce and extend digital hardware development skills which are introduced in the first year. It employs industry-standard tools and languages which are used worldwide for silicon development. The UK has perhaps the strongest expertise in Europe in these areas and skills are in high demand from employers such as ARM and Imagination Technologies who provide much of the digital design for devices such as smartphones and tablet computers.

Teaching and learning methods




20 hours in total

Learning outcomes

Learning outcomes are detailed on the COMP22111 course unit syllabus page on the School of Computer Science's website for current students.

Employability skills

  • Analytical skills
  • Innovation/creativity
  • Problem solving
  • Other

Assessment methods

  • Written exam - 55%
  • Written assignment (inc essay) - 45%


Introduction (2)

Scales of integration, CMOS versus other technologies, VLSI trends, overview of top down design hierarchy, VLSI design route.

Verilog Hardware Description Language (4)

Principles, structure, features and syntax, scheduling and parallelism, hierarchical structures; test benches.

The STUMP - an example RISC(2)

RISC versus CISC, load/store architecture, non-pipelined behaviour, instruction set.

An example CISC (1)

A look at a CISC instruction set as a point of comparison.

Architectural Design of STUMP (1)

Block partitioning, datapath occupancy.

Register Transfer Level Design (1)

Formation of a STUMP datapath.

Finite State Machines (1)

The application of FSMs and their implementation in Verilog.

Design Flows (1)

CAD tools from concept to (working) chip.

Verification and Testing (1)

Modelling and testing designs at different levels of abstraction, yields and testing chips, test coverage.

Timing and Clocking (1)

Clock generation, buffering, and distribution; crossing clock domains.

Technology (1)

VLSI structures, standard cells, macrocells, ASICs and FPGAs.

Recommended reading

COMP22111 reading list can be found on the School of Computer Science website for current students.

Feedback methods

Direct feedback comes from laboratory work, both from working with the tools themselves and from the staff. Development results can (and should) be observed throughout using simulation and test. Final results are observable with a hardware realisation.

Less formal feedback is available at all times, especially during lectures and laboratory sessions.

Study hours

  • Assessment written exam - 2 hours
  • Lectures - 11 hours
  • Practical classes & workshops - 22 hours
  • Independent study hours - 65 hours

Teaching staff

Paul Nutter - Unit coordinator

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